Chemical-mechanical polishing (“CMP”) is a common method used to planarize individual layers (e.g., dielectric or metal layers) during integrated circuit (“IC”) fabrication on a semiconductor wafer. CMP removes undesirable topographical features of the IC on the wafer. For example, CMP may be used to remove metal deposits subsequent to damascene processes, excess oxide from shallow trench isolation steps, to planarize inter-metal dielectrics (“IMD”) or in the construction of devices with complex architecture, such as system-on-a chip (“SoC”) designs and vertical gate structures with varying pattern densities (e.g., FinFETs). (For additional information, see Chemical-Mechanical Planarization of Semiconductors, M. R. Oliver (Ed.), Springer Series in Material Science, vol. 69, 2004.)
CMP utilizes a reactive liquid medium that contains engineered abrasive particles (“slurry”) and a polishing pad to provide chemical and mechanical control. The slurry, or possibly the polishing pad, in addition, may contain nano-sized inorganic particles that enhance chemical reactivity and/or mechanical activity of the CMP process. Typically, CMP is done with slurry and pad in contact with the substrate containing the surface needing to be polished (e.g., blanket or patterned wafer). U.S. Pat. No. 6,458,289, for instance, discloses an emulsion-based CMP slurry that is used in this way. The emulsion-based slurry, an enhanced version of an otherwise typical particle- or abrasive-based CMP slurry, may be used as a replacement to the typical particle- or abrasive-based CMP slurries that are currently in use. As a replacement slurry, the emulsion-based slurry of U.S. Pat. No. 6,458,289 is used like other CMP slurries; i.e., the emulsion-based slurry is dispensed on the surface of a CMP polishing pad, which may or may not contain additional abrasives.
Inorganic particles in CMP slurries are known contributors to defects generated during the CMP process. These abrasive particles may generate microscratches and other defects (e.g., chatter marks) seen on polished/planarized semiconductor wafers. In addition, the polishing pad and the downforce with which the wafer is held to the polishing pad may contribute to defects on patterned wafers, most commonly dishing and erosion, both of which can detract from high flatness.
One or more features, alone or in combination, form areas or patterns of different densities which polish at different rates under current CMP practices. Differential material removal rates across regions of different pattern density result in non-uniform removal and within-die variations of film thickness. The resulting topography, which is typically better after CMP than before CMP, is still not adequately uniform and may be cause for yield loss from, for example, a variety of electrical failures. Certain regions of low pattern density clear adequately, while regions of high pattern density do not, a situation which necessitates over-polishing. Over-polishing typically results in recessed regions in large metal structures (such as bond pads), a phenomenon known as dishing, attributable to the chemical and mechanical actions of the slurry (e.g., abrasive gouging) and the pad (e.g., pad flexing). Large metal line widths (i.e., wide open areas metal) for example show large evidence of dishing on their structures.
Another effect of over-polishing is erosion of the film underneath the layer being polished (e.g., oxide in case of copper CMP, or nitride in case of shallow trench isolation CMP (“STI CMP”). Erosion is defined as the decrease in the film thickness from the originally deposited film thickness resulting from over-polishing the layer being polished above it (e.g., copper). Erosion, like dishing, may be caused by pad flexing and abrasive gouging, but typically occurs in arrays of narrow features wherein both metal and oxide are simultaneously removed. The severity of dishing and erosion on the integrity of the film stacks on a chip during CMP depends on the chemical and mechanical aspects of the CMP process and is affected by the slurry and the pad and the complex interactions of the various components of CMP. The downforce with which the wafer is held against the polishing pad is also thought to create shear stresses that can contribute to peeling and/or delamination.
Some abrasive-free CMP formulations have been described, for example, in U.S. Pat. Nos. 6,800,218, 6,451,697 and U.S. application Ser. No. 09/543,777 (now abandoned) in efforts to circumvent some of the above-mentioned problems.
Provided are effective polishing apparatus, methods, and formulations that, in a number of instances, may provide finished (e.g., lacking small-scale roughness) and flat (e.g., lacking substantial deviations in planarity) substrate surfaces. Various methods disclosed herein may be highly efficient, cost effective, and environmentally friendly, especially useful in light of today's heightened environmental consciousness.